[PDF] Top 20 Low-power low-voltage reference using peaking current mirror circuit
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Low-power low-voltage reference using peaking current mirror circuit
... Low-power low-voltage reference using peaking current mirror circuit ...A low-power low-voltage bandgap reference ... See full document
2
A Low Voltage High Current EV Drive Using Inverter Low Side Switches as Current Sensors
... armature current sensing technique is proposed for synthesizing the three-phase line current by using the low-side switches of the inverter as current ...additional current ... See full document
6
Low power on-chip current monitoring medium-grained adaptive voltage control
... replica, current characteristic of target circuits is ...proposed current monitor distinguishes between the switching and stable state of the circuit by monitoring the current ...on ... See full document
4
New Low-Leakage Power-Rail ESD Clamp Circuit in a 65-nm Low-Voltage CMOS Process
... new power-rail ESD clamp circuit designed with con- sideration of the gate leakage issue has been proposed and successfully verified in a 65-nm CMOS process by using only thin-oxide ... See full document
10
A Low Voltage All-Digital On-Chip Oscillator Using Relative Reference Modeling
... The implementation is carried out in a 90-nm CMOS process with the standard supply voltage of 1 V. Two additional con- tributions are further satisfied for various application require- ments: 1) standard logic ... See full document
6
Design of Power-Rail ESD Clamp Circuit With Ultra-Low Standby Leakage Current in Nanoscale CMOS Technology
... ultra-low-leakage power-rail ESD clamp circuit is shown in ...a low holding voltage can sustain a high ESD level within a small silicon area in CMOS ...of using the SCR device as ... See full document
9
Design of High-Voltage-Tolerant ESD Protection Circuit in Low-Voltage CMOS Processes
... detection circuit under 0-to-6 V ESD-like transition on ESD bus line (the line for node e overlaps with the line for node ...clamp circuit A seems to be eas- ily implemented, however it needs extra mask and ... See full document
10
Low Power Domino Circuit Design 邱威豪、林浩仁
... supply voltage and threshold voltage is scaled ...leakage current to be one of the critical issues in the very deep submicron designs, and will seriously cause unnecessary power ...always ... See full document
2
A 2.4, 5.2, and 5.7 GHz CMFB gilbert downconverter with low-voltage cascode current mirror input stage
... output current of the improved cas- code current mirror RF input ...leakage power at the IF-port ...quiescent current of the circuit is about 7.6 mA at supply voltage of ... See full document
5
Converter-free multiple-voltage scaling techniques for low-power CMOS digital design
... avoid using level converters in a CMOS circuit with multiple supply voltages, we put constraints on the voltage differences between adja- cent gates with different supply ...static current if ... See full document
5
Low-Ripple and Dual-Phase Charge Pump Circuit Regulated by Switched-Capacitor-Based Bandgap Reference
... dc/dc power converters, the charge pump needs less ex- ternal components than the inductive switching ...the power con- verters. The charge pump circuits can boost or buck voltage using only ... See full document
12
Instruction-Cycle-Based Dynamic Voltage Scaling Power Management for Low-Power Digital Signal Processor With 53% Power Savings
... supply voltage is sufficiently high to avoid blocking of DSP execution flow during down-tracking voltage ...down-tracking voltage transition is as follows. First, the D-LDO regulator pulls low ... See full document
13
Low-power wordline voltage generator for low-voltage flash memory
... the low standby current, the voltage divider requires large resistors in standby ...the circuit has a lower standby ...of power supply voltage and temperature has great influence ... See full document
4
Design of high-voltage-tolerant power-rail ESD clamp circuit in low-voltage CMOS processes
... A new high-voltage-tolerant power-rail electrostatic discharge (ESD) clamp circuit with a special ESD detection circuit realized with only IxVDD devices for 3xVDD-tolerant mixed-voltage [r] ... See full document
2
Low-voltage BiCMOS dynamic minimum circuit using a parallel comparison algorithm for fuzzy controllers
... BiCMOS integrated circuits The Letter presents a low-voltage BiCMOS dynamic minimum circuit using a parallel comparison algorithm for VLSI implementation of fuzzy contr[r] ... See full document
2
Design to suppress return-back leakage current of charge pump circuit in low-voltage CMOS process
... pump circuit with the design to suppress the re- turn-back leakage current in low-voltage CMOS process has been proposed and successfully verified in ...leakage current thus generated to ... See full document
8
An optimization-based low-power voltage scaling technique using multiple supply voltages
... Based on the critical order, we increase the supply voltages of the gates in order until the delays of all selected long paths are no more than the given timing constraint.. The [r] ... See full document
4
Design of mixed-voltage crystal oscillator circuit in low-voltage CMOS technology
... oscillator circuit is shown in ...a voltage gain and 180- degree phase shift, which is integrated into the chip with the XI and XO ...of power supply voltage, therefore the inverting amplifier ... See full document
4
1.5 V CMOS full-swing energy efficient logic (EEL) circuit suitable for low-voltage and low-power VLSI applications
... A 1.5V full-swing energy efficient logic circuit is reported that is suitable for next-generation low-power VLSI applications using a low supply voltage.. Introduction: Fo[r] ... See full document
2
Design optimization of a current mirror amplifier integrated circuit using a computational statistics technique
... a current mirror amplifier [8–10,19] with ...studied current mirror amplifier ...of voltage gain, cut-off frequency, phase margin, common-mode rejection ratio and slew-rate; and the ... See full document
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